| 000 | 00731nam a22002657a 4500 | ||
|---|---|---|---|
| 001 | 5765 | ||
| 003 | BD-DhEU | ||
| 005 | 20260302120022.0 | ||
| 008 | 260302b20032026ii ||||| |||| 00| 0 eng d | ||
| 020 | _a8177589180 | ||
| 040 |
_aBD-DhEU _beng _cBD-DhEU _dBD-DhEU |
||
| 041 | _aeng | ||
| 082 | 0 | 0 |
_223rd ED. _a321.395 PAV _b2003 |
| 100 | 1 | 0 |
_aPalnitkar, Samir _99355 |
| 245 | 0 | 0 |
_aVerilog HDL : a guide to digital design and synthesis / _cSamir Palnitkar |
| 250 | _a2nd ed. | ||
| 260 |
_aIndia ; _bPearson , _cc 2003. |
||
| 300 |
_a490 p .: _bill ; _c24 cm. |
||
| 500 | _aIncludes Index | ||
| 526 | _aCSE | ||
| 590 | _aKamrujjaman | ||
| 650 |
_aVerilog HDL _99356 |
||
| 650 |
_aGuide to Digital Design _99357 |
||
| 942 |
_2ddc _cBK |
||
| 999 |
_c5731 _d5731 |
||