TY  - BOOK
AU  - Brown,Stephen
AU  - Vranesic,Zvonko G.
TI  - Fundamentals of digital logic with verilog design
SN  - 0070667242
U1  - 621.395 23
PY  - 2008///
CY  - New Delhi
PB  - Tata McGraw-Hill Higher Education
KW  - Logic circuits
KW  - Design and construction
KW  - Data processing
KW  - Verilog (Computer hardware description language)
KW  - Computer-aided design
N1  - Includes bibliographical references and index
UR  - http://www.loc.gov/catdir/toc/ecip0712/2007008622.html
UR  - http://www.loc.gov/catdir/enhancements/fy0803/2007008622-b.html
UR  - http://www.loc.gov/catdir/enhancements/fy0803/2007008622-d.html
ER  -